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Freescale Semiconductor /MKV58F24 /SIM /SOPT9

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Interpret as SOPT9

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (00)FTM1ICH0SRC 0 (0)FTM1ICH1SRC 0 (00)FTM2ICH0SRC 0 (0)FTM2ICH1SRC 0 (00)FTM0CLKSEL 0 (00)FTM1CLKSEL 0 (00)FTM2CLKSEL 0 (00)FTM3CLKSEL

FTM1ICH0SRC=00, FTM0CLKSEL=00, FTM1CLKSEL=00, FTM2CLKSEL=00, FTM1ICH1SRC=0, FTM2ICH1SRC=0, FTM2ICH0SRC=00, FTM3CLKSEL=00

Description

System Options Register 9

Fields

FTM1ICH0SRC

FTM1 channel 0 input capture source select

0 (00): FTM1_CH0 signal

1 (01): CMP0 output

2 (10): CMP1 output
FTM1ICH1SRC

FTM1 channel 0 input capture source select

0 (0): FTM1_CH1 signal

1 (1): Exclusive OR of FTM1_CH1, FTM1_CH0, and XBARA output 42 (XBARA output 42 can also trigger HSADC1A sync0)
FTM2ICH0SRC

FTM2 channel 0 input capture source select

0 (00): FTM2_CH0 signal

1 (01): CMP0 output

2 (10): CMP1 output
FTM2ICH1SRC

FTM2 channel 1 input capture source select

0 (0): FTM2_CH1 signal

1 (1): Exclusive OR of FTM2_CH1, FTM2_CH0 and FTM1_CH1
FTM0CLKSEL

FlexTimer 0 External Clock Pin Select

0 (00): FTM0 external clock driven by FTM_CLK0 pin

1 (01): FTM0 external clock driven by FTM_CLK1 pin

2 (10): FTM0 external clock driven by FTM_CLK2 pin
FTM1CLKSEL

FlexTimer 1 External Clock Pin Select

0 (00): FTM1 external clock driven by FTM_CLK0 pin

1 (01): FTM1 external clock driven by FTM_CLK1 pin

2 (10): FTM1 external clock driven by FTM_CLK2 pin
FTM2CLKSEL

FlexTimer 2 External Clock Pin Select

0 (00): FTM2 external clock driven by FTM_CLK0 pin

1 (01): FTM2 external clock driven by FTM_CLK1 pin

2 (10): FTM2 external clock driven by FTM_CLK2 pin
FTM3CLKSEL

FlexTimer 3 External Clock Pin Select

0 (00): FTM3 external clock driven by FTM_CLK0 pin

1 (01): FTM3 external clock driven by FTM_CLK1 pin

2 (10): FTM3 external clock driven by FTM_CLK2 pin

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Register License

Redistribution and use in source and binary forms, with or without modification,\nare permitted provided that the following conditions are met:\n o Redistributions of source code must retain the above copyright notice, this list\n of conditions and the following disclaimer.\n o Redistributions in binary form must reproduce the above copyright notice, this\n list of conditions and the following disclaimer in the documentation and/or\n other materials provided with the distribution.\n o Neither the name of Freescale Semiconductor, Inc. nor the names of its\n contributors may be used to endorse or promote products derived from this\n software without specific prior written permission.\n THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS “AS IS” AND\n ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED\n WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE\n DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR\n ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES\n (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\n LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON\n ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\n (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS\n SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data